1. Technical Field
The present invention is directed to an improved data processing system. More specifically, the present invention provides an apparatus and method for an advanced queue pair multiplexing apparatus and method to allow Internet Protocol (IP) frames to be delivered to more than one queue.
2. Description of Related Art
In a System Area Network (SAN), such as an InfiniBand (IB) network, the hardware provides a message passing mechanism that can be used for Input/Output devices (I/O) and interprocess communications (IPC) between general computing nodes. Processes executing on devices access SAN message passing hardware by posting send/receive messages to send/receive work queues on a SAN channel adapter (CA). These processes also are referred to as “consumers.”
The send/receive work queues (WQ) are assigned to a consumer as a queue pair (QP). The messages can be sent over five different transport types: Reliable Connected (RC), Reliable Datagram (RD), Unreliable Connected (UC), Unreliable Datagram (UD), and Raw Datagram (RawD). Consumers retrieve the results of these messages from a completion queue (CQ) through SAN work completion (WC) queues. The source channel adapter takes care of segmenting outbound messages and sending them to the destination. The destination channel adapter takes care of reassembling inbound messages and placing them in the memory space designated by the destination's consumer.
Two channel adapter types are present in nodes of the SAN fabric, a host channel adapter (HCA) and a target channel adapter (TCA). The host channel adapter is used by general purpose computing nodes to access the SAN fabric. Consumers use SAN verbs to access host channel adapter functions. The software that interprets verbs and directly accesses the channel adapter is known as the channel interface (CI).
Target channel adapters (TCA) are used by nodes that are the subject of messages sent from host channel adapters. The target channel adapters serve a similar function as that of the host channel adapters in providing the target node an access point to the SAN fabric.
Standard implementations of the SAN architecture described above use one queue pair per CA port for all Internet Protocol (IP) suite traffic. This presents several problems for the IP traffic. First, for hosts with multiple processors, a single queue pair does not lend itself to multithreading of the IP traffic, because, for example, all the incoming traffic would be received by the shared QP versus being routed to the thread associated with the incoming traffic. Second, as the amount of IP traffic increases, a point is reached where a single queue pair can become a bottleneck, for example, by causing all incoming traffic to be handled by one processor of a multiple processor planar versus distributing the incoming traffic among QPs that are each associated with one processor of the multiple processors. Finally, a single queue pair makes it difficult for a host channel adapter to provide differentiated services, because all traffic is treated equally versus differentiating the service of some of the traffic.
Therefore, it would be beneficial to provide a mechanism which allows a single host channel adapter port to support multiple IP queue pairs.